%0 Conference Paper %1 conf/ims/NicolaescuJVNG00 %A Nicolaescu, Dan %A Ji, Xiaomei %A Veidenbaum, Alexander V. %A Nicolau, Alexandru %A Gupta, Rajesh K. %B Intelligent Memory Systems %D 2000 %E Chong, Frederic T. %E Kozyrakis, Christoforos E. %E Oskin, Mark %I Springer %K dblp %P 183-187 %T Compiler-Directed Cache Line Size Adaptivity. %U http://dblp.uni-trier.de/db/conf/ims/ims2000.html#NicolaescuJVNG00 %V 2107 %@ 3-540-42328-1

@inproceedings{conf/ims/NicolaescuJVNG00, added-at = {2018-02-05T00:00:00.000+0100}, author = {Nicolaescu, Dan and Ji, Xiaomei and Veidenbaum, Alexander V. and Nicolau, Alexandru and Gupta, Rajesh K.}, biburl = {https://www.bibsonomy.org/bibtex/2eac2b598e91da2d482d0d0314e188f58/dblp}, booktitle = {Intelligent Memory Systems}, crossref = {conf/ims/2000}, editor = {Chong, Frederic T. and Kozyrakis, Christoforos E. and Oskin, Mark}, ee = {https://doi.org/10.1007/3-540-44570-6_15}, interhash = {23b9b3a18696e3d5f3fc1c98b3b685a1}, intrahash = {eac2b598e91da2d482d0d0314e188f58}, isbn = {3-540-42328-1}, keywords = {dblp}, pages = {183-187}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2019-05-15T13:14:44.000+0200}, title = {Compiler-Directed Cache Line Size Adaptivity.}, url = {http://dblp.uni-trier.de/db/conf/ims/ims2000.html#NicolaescuJVNG00}, volume = 2107, year = 2000 }