%0 Journal Article %1 journals/vlsisp/WangS09 %A Wang, Chua-Chin %A Sung, Gang-Neng %D 2009 %J J. Signal Process. Syst. %K dblp %N 3 %P 331-338 %T Low-Power Multiplier Design Using a Bypassing Technique. %U http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp57.html#WangS09 %V 57

@article{journals/vlsisp/WangS09, added-at = {2020-03-12T00:00:00.000+0100}, author = {Wang, Chua-Chin and Sung, Gang-Neng}, biburl = {https://www.bibsonomy.org/bibtex/27153474329eb87b3793967d2e06ac2e5/dblp}, ee = {https://doi.org/10.1007/s11265-008-0319-y}, interhash = {243c0cc113012fe45b963e67de9f95b3}, intrahash = {7153474329eb87b3793967d2e06ac2e5}, journal = {J. Signal Process. Syst.}, keywords = {dblp}, number = 3, pages = {331-338}, timestamp = {2020-03-13T12:00:32.000+0100}, title = {Low-Power Multiplier Design Using a Bypassing Technique.}, url = {http://dblp.uni-trier.de/db/journals/vlsisp/vlsisp57.html#WangS09}, volume = 57, year = 2009 }