%0 Conference Paper %1 conf/cans/MantelSSWWW20 %A Mantel, Heiko %A Scheidel, Lukas %A Schneider, Thomas %A Weber, Alexandra %A Weinert, Christian %A Weißmantel, Tim %B CANS %D 2020 %E Krenn, Stephan %E Schulmann, Haya %E Vaudenay, Serge %I Springer %K dblp %P 505-525 %T RiCaSi: Rigorous Cache Side Channel Mitigation via Selective Circuit Compilation. %U http://dblp.uni-trier.de/db/conf/cans/cans2020.html#MantelSSWWW20 %V 12579 %@ 978-3-030-65411-5

@inproceedings{conf/cans/MantelSSWWW20, added-at = {2023-09-30T00:00:00.000+0200}, author = {Mantel, Heiko and Scheidel, Lukas and Schneider, Thomas and Weber, Alexandra and Weinert, Christian and Weißmantel, Tim}, biburl = {https://www.bibsonomy.org/bibtex/2a6ed96caa9638f25a81c34279de5c3b4/dblp}, booktitle = {CANS}, crossref = {conf/cans/2020}, editor = {Krenn, Stephan and Schulmann, Haya and Vaudenay, Serge}, ee = {https://doi.org/10.1007/978-3-030-65411-5_25}, interhash = {2615e2095505cf75d6668eee470c9e59}, intrahash = {a6ed96caa9638f25a81c34279de5c3b4}, isbn = {978-3-030-65411-5}, keywords = {dblp}, pages = {505-525}, publisher = {Springer}, series = {Lecture Notes in Computer Science}, timestamp = {2024-04-10T00:35:38.000+0200}, title = {RiCaSi: Rigorous Cache Side Channel Mitigation via Selective Circuit Compilation.}, url = {http://dblp.uni-trier.de/db/conf/cans/cans2020.html#MantelSSWWW20}, volume = 12579, year = 2020 }