%0 Conference Paper %1 conf/vlsit/SongLYCCWHCHLWL22 %A Song, M. Y. %A Lee, C. M. %A Yang, S. Y. %A Chen, G. L. %A Chen, K. M. %A Wang, I J. %A Hsin, Y. C. %A Chang, K. T. %A Hsu, C. F. %A Li, S. H. %A Wei, J. H. %A Lee, T. Y. %A Chang, M. F. %A Bao, X. Y. %A Diaz, C. H. %A Lin, S. J. %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 377-378 %T High speed (1ns) and low voltage (1.5V) demonstration of 8Kb SOT-MRAM array. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#SongLYCCWHCHLWL22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/SongLYCCWHCHLWL22, added-at = {2022-08-04T00:00:00.000+0200}, author = {Song, M. Y. and Lee, C. M. and Yang, S. Y. and Chen, G. L. and Chen, K. M. and Wang, I J. and Hsin, Y. C. and Chang, K. T. and Hsu, C. F. and Li, S. H. and Wei, J. H. and Lee, T. Y. and Chang, M. F. and Bao, X. Y. and Diaz, C. H. and Lin, S. J.}, biburl = {https://www.bibsonomy.org/bibtex/2e7744c55d0fb4c9891070a32c20737d4/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830149}, interhash = {2b32b8c7512a5d0202f9280250bcb3b6}, intrahash = {e7744c55d0fb4c9891070a32c20737d4}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {377-378}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {High speed (1ns) and low voltage (1.5V) demonstration of 8Kb SOT-MRAM array.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#SongLYCCWHCHLWL22}, year = 2022 }