%0 Conference Paper %1 conf/glvlsi/HuangYZY20 %A Huang, Yucong %A Yang, Zhitao %A Zhu, Jianghan %A Ye, Terry Tao %B ACM Great Lakes Symposium on VLSI %D 2020 %E Mohsenin, Tinoosh %E Zhao, Weisheng %E Chen, Yiran %E Mutlu, Onur %I ACM %K dblp %P 493-498 %T Analog Circuit Implementation of Neurons with Multiply-Accumulate and ReLU Functions. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2020.html#HuangYZY20 %@ 978-1-4503-7944-1

@inproceedings{conf/glvlsi/HuangYZY20, added-at = {2021-04-09T00:00:00.000+0200}, author = {Huang, Yucong and Yang, Zhitao and Zhu, Jianghan and Ye, Terry Tao}, biburl = {https://www.bibsonomy.org/bibtex/2a25d62ca98eba924b899c66632fcc8c9/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2020}, editor = {Mohsenin, Tinoosh and Zhao, Weisheng and Chen, Yiran and Mutlu, Onur}, ee = {https://doi.org/10.1145/3386263.3406941}, interhash = {301075c1dd3d0e12ff8fa7ede208fe48}, intrahash = {a25d62ca98eba924b899c66632fcc8c9}, isbn = {978-1-4503-7944-1}, keywords = {dblp}, pages = {493-498}, publisher = {ACM}, timestamp = {2024-04-09T22:51:17.000+0200}, title = {Analog Circuit Implementation of Neurons with Multiply-Accumulate and ReLU Functions.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2020.html#HuangYZY20}, year = 2020 }