%0 Conference Paper %1 conf/icassp/HuangCCC05 %A Huang, Chao-Tsung %A Chen, Ching-Yeh %A Chen, Yi-Hau %A Chen, Liang-Gee %B ICASSP (5) %D 2005 %I IEEE %K dblp %P 93-96 %T Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering video coding applications. %U http://dblp.uni-trier.de/db/conf/icassp/icassp2005-5.html#HuangCCC05 %@ 0-7803-8874-7

@inproceedings{conf/icassp/HuangCCC05, added-at = {2017-06-04T00:00:00.000+0200}, author = {Huang, Chao-Tsung and Chen, Ching-Yeh and Chen, Yi-Hau and Chen, Liang-Gee}, biburl = {https://www.bibsonomy.org/bibtex/2a9013694cc2479d52fb0465abf3f024e/dblp}, booktitle = {ICASSP (5)}, crossref = {conf/icassp/2005}, ee = {https://doi.org/10.1109/ICASSP.2005.1416248}, interhash = {315bf85651a8d73113e1380b2a1d9ffa}, intrahash = {a9013694cc2479d52fb0465abf3f024e}, isbn = {0-7803-8874-7}, keywords = {dblp}, pages = {93-96}, publisher = {IEEE}, timestamp = {2019-10-17T17:08:14.000+0200}, title = {Memory analysis of VLSI architecture for 5/3 and 1/3 motion-compensated temporal filtering [video coding applications].}, url = {http://dblp.uni-trier.de/db/conf/icassp/icassp2005-5.html#HuangCCC05}, year = 2005 }