%0 Conference Paper %1 conf/fpt/QiuLXYW18 %A Qiu, Yunhui %A Lv, Hankun %A Xie, Jinyu %A Yin, Wenbo %A Wang, Lingli %B FPT %D 2018 %I IEEE %K dblp %P 142-149 %T Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA. %U http://dblp.uni-trier.de/db/conf/fpt/fpt2018.html#QiuLXYW18 %@ 978-1-7281-0214-6

@inproceedings{conf/fpt/QiuLXYW18, added-at = {2019-06-27T00:00:00.000+0200}, author = {Qiu, Yunhui and Lv, Hankun and Xie, Jinyu and Yin, Wenbo and Wang, Lingli}, biburl = {https://www.bibsonomy.org/bibtex/27d05af0c1ab7290cffc792d5123ffdc5/dblp}, booktitle = {FPT}, crossref = {conf/fpt/2018}, ee = {https://doi.org/10.1109/FPT.2018.00030}, interhash = {35807a397369e10eef85fa16364565ee}, intrahash = {7d05af0c1ab7290cffc792d5123ffdc5}, isbn = {978-1-7281-0214-6}, keywords = {dblp}, pages = {142-149}, publisher = {IEEE}, timestamp = {2019-10-17T23:10:29.000+0200}, title = {Ultra-Low-Latency and Flexible In-memory Key-Value Store System Design on CPU-FPGA.}, url = {http://dblp.uni-trier.de/db/conf/fpt/fpt2018.html#QiuLXYW18}, year = 2018 }