Inproceedings,
A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration.
J. Heo, K. Kim, D. Lee, C. Lee, D. Moon, K. Kim, J. Baek, S. Yoon, H. Yang, K. Kim, Y. Kim, B. Park, S. Park, J. Moon, J. Lee, Y. Park, S. Jang, S. Hyun, H. Kwon, J. Choi, Y. Sohn, S. Bae, K. Park, and J. Lee.VLSI Circuits, page 114-. IEEE, (2019)
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- conf/vlsic/HeoKLLMKBYYKKPP19
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- inproceedings
- booktitle
- VLSI Circuits
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- 2019
- pages
- 114-
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- IEEE
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- conf/vlsic/2019
- ee
- https://doi.org/10.23919/VLSIC.2019.8778102
- isbn
- 978-4-86348-720-8
- url
- http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#HeoKLLMKBYYKKPP19
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%1 conf/vlsic/HeoKLLMKBYYKKPP19
%A Heo, Jin-Seok
%A Kim, Kihan
%A Lee, Dong-Hoon
%A Lee, Chang-Kyo
%A Moon, Daesik
%A Kim, Kiho
%A Baek, Jin-Hyeok
%A Yoon, Sung-Woo
%A Yang, Hui-Kap
%A Kim, Kyungryun
%A Kim, Youngjae
%A Park, Bokgue
%A Park, Su-Jin
%A Moon, Joung-Wook
%A Lee, Jae-Hyung
%A Park, Yun-Sik
%A Jang, Soobong
%A Hyun, Seok-Hun
%A Kwon, Hyuck-Joon
%A Choi, Jung-Hwan
%A Sohn, Young-Soo
%A Bae, Seung-Jun
%A Park, Kwang-Il
%A Lee, Jung-Bae
%B VLSI Circuits
%D 2019
%I IEEE
%K dblp
%P 114-
%T A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration.
%U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#HeoKLLMKBYYKKPP19
%@ 978-4-86348-720-8
@inproceedings{conf/vlsic/HeoKLLMKBYYKKPP19,
added-at = {2019-08-05T00:00:00.000+0200},
author = {Heo, Jin-Seok and Kim, Kihan and Lee, Dong-Hoon and Lee, Chang-Kyo and Moon, Daesik and Kim, Kiho and Baek, Jin-Hyeok and Yoon, Sung-Woo and Yang, Hui-Kap and Kim, Kyungryun and Kim, Youngjae and Park, Bokgue and Park, Su-Jin and Moon, Joung-Wook and Lee, Jae-Hyung and Park, Yun-Sik and Jang, Soobong and Hyun, Seok-Hun and Kwon, Hyuck-Joon and Choi, Jung-Hwan and Sohn, Young-Soo and Bae, Seung-Jun and Park, Kwang-Il and Lee, Jung-Bae},
biburl = {https://www.bibsonomy.org/bibtex/290f87067891af85a33d96bf1d64dc0b4/dblp},
booktitle = {VLSI Circuits},
crossref = {conf/vlsic/2019},
ee = {https://doi.org/10.23919/VLSIC.2019.8778102},
interhash = {35f656ab31effff4f7b70ff467f1fdf2},
intrahash = {90f87067891af85a33d96bf1d64dc0b4},
isbn = {978-4-86348-720-8},
keywords = {dblp},
pages = {114-},
publisher = {IEEE},
timestamp = {2019-08-06T11:40:26.000+0200},
title = {A 5Gb/s/pin 16Gb LPDDR4/4X Reconfigurable SDRAM with Voltage-High Keeper and a Prediction-based Fast-tracking ZQ Calibration.},
url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#HeoKLLMKBYYKKPP19},
year = 2019
}