%0 Conference Paper %1 conf/iscas/NaessOBL03 %A Næss, Øivind %A Olsen, Espen A. %A Berg, Yngvar %A Lande, Tor Sverre %B ISCAS (1) %D 2003 %I IEEE %K dblp %P 125-128 %T A low voltage second order biquad using pseudo floating-gate transistors. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2003-1.html#NaessOBL03 %@ 0-7803-7761-3

@inproceedings{conf/iscas/NaessOBL03, added-at = {2016-05-20T00:00:00.000+0200}, author = {Næss, Øivind and Olsen, Espen A. and Berg, Yngvar and Lande, Tor Sverre}, biburl = {https://www.bibsonomy.org/bibtex/2154c73346d86f6b2fe13e51e2d35bbce/dblp}, booktitle = {ISCAS (1)}, crossref = {conf/iscas/2003}, ee = {http://dx.doi.org/10.1109/ISCAS.2003.1205516}, interhash = {369b90765f028035d750f9e0ac10bcb3}, intrahash = {154c73346d86f6b2fe13e51e2d35bbce}, isbn = {0-7803-7761-3}, keywords = {dblp}, pages = {125-128}, publisher = {IEEE}, timestamp = {2016-05-21T11:45:42.000+0200}, title = {A low voltage second order biquad using pseudo floating-gate transistors.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2003-1.html#NaessOBL03}, year = 2003 }