%0 Conference Paper %1 conf/sips/AndriamisainaGC06 %A Andriamisaina, Caaliph %A Gal, Bertrand Le %A Casseau, Emmanuel %B SiPS %D 2006 %I IEEE %K dblp %P 280-285 %T Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems. %U http://dblp.uni-trier.de/db/conf/sips/sips2006.html#AndriamisainaGC06 %@ 1-4244-0382-0

@inproceedings{conf/sips/AndriamisainaGC06, added-at = {2009-09-11T00:00:00.000+0200}, author = {Andriamisaina, Caaliph and Gal, Bertrand Le and Casseau, Emmanuel}, biburl = {https://www.bibsonomy.org/bibtex/2e4c79648cb3880a48654565c029d90d2/dblp}, booktitle = {SiPS}, crossref = {conf/sips/2006}, date = {2009-09-11}, description = {dblp}, ee = {http://dx.doi.org/10.1109/SIPS.2006.352595}, interhash = {3a1507c477ebd337fa596284ce112ccb}, intrahash = {e4c79648cb3880a48654565c029d90d2}, isbn = {1-4244-0382-0}, keywords = {dblp}, pages = {280-285}, publisher = {IEEE}, timestamp = {2009-09-12T11:35:28.000+0200}, title = {Bit-Width Optimizations for High-Level Synthesis of Digital Signal Processing Systems.}, url = {http://dblp.uni-trier.de/db/conf/sips/sips2006.html#AndriamisainaGC06}, year = 2006 }