%0 Conference Paper %1 conf/isdcs/MGM19 %A M, Sarath Chandran G. %A Ganeriwala, Mohit D. %A Mohapatra, Nihar Ranjan %B ISDCS %D 2019 %I IEEE %K dblp %P 1-5 %T Capacitance and Surface Potential Model for III-V Double-Gate FET. %U http://dblp.uni-trier.de/db/conf/isdcs/isdcs2019.html#MGM19 %@ 978-1-7281-1226-8

@inproceedings{conf/isdcs/MGM19, added-at = {2022-10-02T00:00:00.000+0200}, author = {M, Sarath Chandran G. and Ganeriwala, Mohit D. and Mohapatra, Nihar Ranjan}, biburl = {https://www.bibsonomy.org/bibtex/21c825b9348030974f0c8d34eef97f715/dblp}, booktitle = {ISDCS}, crossref = {conf/isdcs/2019}, ee = {https://doi.org/10.1109/ISDCS.2019.8719281}, interhash = {3bc505a03dcfe815d99bb50e292c1771}, intrahash = {1c825b9348030974f0c8d34eef97f715}, isbn = {978-1-7281-1226-8}, keywords = {dblp}, pages = {1-5}, publisher = {IEEE}, timestamp = {2024-04-10T11:57:52.000+0200}, title = {Capacitance and Surface Potential Model for III-V Double-Gate FET.}, url = {http://dblp.uni-trier.de/db/conf/isdcs/isdcs2019.html#MGM19}, year = 2019 }