%0 Conference Paper %1 conf/apccas/AkiriTYESW22 %A Akiri, Jyoshnavi %A Tolentino, Lean Karlo S. %A Yang, Lung-Jieh %A Esakki, Balasubramanian %A Sampath, Sivaperumal %A Wang, Chua-Chin %B APCCAS %D 2022 %I IEEE %K dblp %P 251-255 %T A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology. %U http://dblp.uni-trier.de/db/conf/apccas/apccas2022.html#AkiriTYESW22 %@ 978-1-6654-5073-7

@inproceedings{conf/apccas/AkiriTYESW22, added-at = {2024-02-05T00:00:00.000+0100}, author = {Akiri, Jyoshnavi and Tolentino, Lean Karlo S. and Yang, Lung-Jieh and Esakki, Balasubramanian and Sampath, Sivaperumal and Wang, Chua-Chin}, biburl = {https://www.bibsonomy.org/bibtex/2875b8d97069c1126b22ea9c39acd27da/dblp}, booktitle = {APCCAS}, crossref = {conf/apccas/2022}, ee = {https://doi.org/10.1109/APCCAS55924.2022.10090380}, interhash = {13e1645a81fd4c47719c9e03ecafb7f8}, intrahash = {875b8d97069c1126b22ea9c39acd27da}, isbn = {978-1-6654-5073-7}, keywords = {dblp}, pages = {251-255}, publisher = {IEEE}, timestamp = {2024-04-10T01:57:01.000+0200}, title = {A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology.}, url = {http://dblp.uni-trier.de/db/conf/apccas/apccas2022.html#AkiriTYESW22}, year = 2022 }