%0 Journal Article %1 journals/todaes/FangHLDB23 %A Fang, Chenlei %A Huang, Qicheng %A Liu, Zeye %A Ding, Ruizhou %A Blanton, Ronald D. %D 2023 %J ACM Trans. Design Autom. Electr. Syst. %K dblp %N 2 %P 22:1-22:31 %T Efficient Test Chip Design via Smart Computation. %U http://dblp.uni-trier.de/db/journals/todaes/todaes28.html#FangHLDB23 %V 28

@article{journals/todaes/FangHLDB23, added-at = {2023-05-17T00:00:00.000+0200}, author = {Fang, Chenlei and Huang, Qicheng and Liu, Zeye and Ding, Ruizhou and Blanton, Ronald D.}, biburl = {https://www.bibsonomy.org/bibtex/2e916ccde528809a9af4f4fc5b474b0c7/dblp}, ee = {https://doi.org/10.1145/3558393}, interhash = {40179f11ce1291518200ce8fbc5c0e8e}, intrahash = {e916ccde528809a9af4f4fc5b474b0c7}, journal = {ACM Trans. Design Autom. Electr. Syst.}, keywords = {dblp}, month = {March}, number = 2, pages = {22:1-22:31}, timestamp = {2024-04-08T21:43:26.000+0200}, title = {Efficient Test Chip Design via Smart Computation.}, url = {http://dblp.uni-trier.de/db/journals/todaes/todaes28.html#FangHLDB23}, volume = 28, year = 2023 }