%0 Thesis %1 phd/it/Wang16 %A Wang, Juanchi %D 2016 %K dblp %T Multilevel modeling and architectural solutions for emerging technology circuits.

@phdthesis{phd/it/Wang16, added-at = {2023-05-10T00:00:00.000+0200}, author = {Wang, Juanchi}, biburl = {https://www.bibsonomy.org/bibtex/2d26bd206d2025119b492573be417ccb1/dblp}, ee = {https://opac.bncf.firenze.sbn.it/bncf-prod/resource?uri=BVE0730196}, interhash = {40ddebf1c341c4f8d051dfe1524af537}, intrahash = {d26bd206d2025119b492573be417ccb1}, keywords = {dblp}, school = {Polytechnic University of Turin, Italy}, timestamp = {2024-04-09T09:27:50.000+0200}, title = {Multilevel modeling and architectural solutions for emerging technology circuits.}, year = 2016 }