%0 Journal Article %1 journals/ieiceta/WangWSWL02 %A Wang, Jhing-Fa %A Wang, Jia-Ching %A Suen, An-Nan %A Wu, Chung-Hsien %A Li, Fan-Min %D 2002 %J IEICE Trans. Fundam. Electron. Commun. Comput. Sci. %K dblp %N 8 %P 1861-1869 %T VLSI Architecture and Implementation for Speech Recognizer Based on Discriminative Bayesian Neural Network. %U http://dblp.uni-trier.de/db/journals/ieiceta/ieiceta85.html#WangWSWL02 %V 85-A

@article{journals/ieiceta/WangWSWL02, added-at = {2024-07-29T00:00:00.000+0200}, author = {Wang, Jhing-Fa and Wang, Jia-Ching and Suen, An-Nan and Wu, Chung-Hsien and Li, Fan-Min}, biburl = {https://www.bibsonomy.org/bibtex/2f1a02f31e7378483b4305c58407cdb72/dblp}, ee = {http://search.ieice.org/bin/summary.php?id=e85-a_8_1861}, interhash = {4195d1c33bbdcd8d067925a997067781}, intrahash = {f1a02f31e7378483b4305c58407cdb72}, journal = {IEICE Trans. Fundam. Electron. Commun. Comput. Sci.}, keywords = {dblp}, number = 8, pages = {1861-1869}, timestamp = {2024-08-05T07:11:00.000+0200}, title = {VLSI Architecture and Implementation for Speech Recognizer Based on Discriminative Bayesian Neural Network.}, url = {http://dblp.uni-trier.de/db/journals/ieiceta/ieiceta85.html#WangWSWL02}, volume = {85-A}, year = 2002 }