%0 Conference Paper %1 conf/vlsic/SeoKCR19 %A Seo, Min-Jae %A Kim, Ye-Dam %A Chung, Jae-Hyun %A Ryu, Seung-Tak %B VLSI Circuits %D 2019 %I IEEE %K dblp %P 72- %T A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#SeoKCR19 %@ 978-4-86348-720-8

@inproceedings{conf/vlsic/SeoKCR19, added-at = {2022-04-09T00:00:00.000+0200}, author = {Seo, Min-Jae and Kim, Ye-Dam and Chung, Jae-Hyun and Ryu, Seung-Tak}, biburl = {https://www.bibsonomy.org/bibtex/237aeb9041427eafeb92a3a41947fa569/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2019}, ee = {https://doi.org/10.23919/VLSIC.2019.8778005}, interhash = {45028fe4cdd3c31faf0c1d596c78c1db}, intrahash = {37aeb9041427eafeb92a3a41947fa569}, isbn = {978-4-86348-720-8}, keywords = {dblp}, pages = {72-}, publisher = {IEEE}, timestamp = {2024-04-10T15:34:13.000+0200}, title = {A 40nm CMOS 12b 200MS/s Single-amplifier Dual-residue Pipelined-SAR ADC.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2019.html#SeoKCR19}, year = 2019 }