%0 Conference Paper %1 conf/fccm/RestrepoHPTS00 %A Restrepo, Héctor Fabio %A Hoffmann, Ralph %A Pérez-Uribe, Andrés %A Teuscher, Christof %A Sanchez, Eduardo %B FCCM %D 2000 %I IEEE Computer Society %K dblp %P 337-338 %T A Networked FPGA-Based Hardware Implementation of a Neural Network Application. %U http://dblp.uni-trier.de/db/conf/fccm/fccm2000.html#RestrepoHPTS00 %@ 0-7695-0871-5

@inproceedings{conf/fccm/RestrepoHPTS00, added-at = {2023-03-24T00:00:00.000+0100}, author = {Restrepo, Héctor Fabio and Hoffmann, Ralph and Pérez-Uribe, Andrés and Teuscher, Christof and Sanchez, Eduardo}, biburl = {https://www.bibsonomy.org/bibtex/29e58803d5dedc8125895f79e716b8f94/dblp}, booktitle = {FCCM}, crossref = {conf/fccm/2000}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPGA.2000.903443}, interhash = {48a79d262b39e5a5d0c41da0df5e9074}, intrahash = {9e58803d5dedc8125895f79e716b8f94}, isbn = {0-7695-0871-5}, keywords = {dblp}, pages = {337-338}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T12:35:30.000+0200}, title = {A Networked FPGA-Based Hardware Implementation of a Neural Network Application.}, url = {http://dblp.uni-trier.de/db/conf/fccm/fccm2000.html#RestrepoHPTS00}, year = 2000 }