%0 Conference Paper %1 conf/iscas/WangJLLXY14 %A Wang, Yiqun %A Jia, Hongyang %A Liu, Yongpan %A Li, Qing'an %A Xue, Chun Jason %A Yang, Huazhong %B ISCAS %D 2014 %I IEEE %K dblp %P 1050-1053 %T Register allocation for hybrid register architecture in nonvolatile processors. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2014.html#WangJLLXY14 %@ 978-1-4799-3431-7

@inproceedings{conf/iscas/WangJLLXY14, added-at = {2014-08-06T00:00:00.000+0200}, author = {Wang, Yiqun and Jia, Hongyang and Liu, Yongpan and Li, Qing'an and Xue, Chun Jason and Yang, Huazhong}, biburl = {https://www.bibsonomy.org/bibtex/28964bfdfd3dc44a3bbceadf50951b02a/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2014}, ee = {http://dx.doi.org/10.1109/ISCAS.2014.6865319}, interhash = {4fcfb9693c358390b5c416ba7e398d9a}, intrahash = {8964bfdfd3dc44a3bbceadf50951b02a}, isbn = {978-1-4799-3431-7}, keywords = {dblp}, pages = {1050-1053}, publisher = {IEEE}, timestamp = {2016-05-21T12:18:28.000+0200}, title = {Register allocation for hybrid register architecture in nonvolatile processors.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2014.html#WangJLLXY14}, year = 2014 }