%0 Conference Paper %1 conf/apsipa/BoDHZ13 %A Bo, Yifan %A Dou, Renfeng %A Han, Jun %A Zeng, Xiaoyang %B APSIPA %D 2013 %I IEEE %K dblp %P 1-4 %T A hardware-efficient variable-length FFT processor for low-power applications. %U http://dblp.uni-trier.de/db/conf/apsipa/apsipa2013.html#BoDHZ13 %@ 978-1-4799-2794-4

@inproceedings{conf/apsipa/BoDHZ13, added-at = {2018-08-27T00:00:00.000+0200}, author = {Bo, Yifan and Dou, Renfeng and Han, Jun and Zeng, Xiaoyang}, biburl = {https://www.bibsonomy.org/bibtex/2cde2c152d5524fcf08e3d201ae8bbeaf/dblp}, booktitle = {APSIPA}, crossref = {conf/apsipa/2013}, ee = {https://doi.org/10.1109/APSIPA.2013.6694120}, interhash = {5047f9a4e4c76370e0ebf33996a79c35}, intrahash = {cde2c152d5524fcf08e3d201ae8bbeaf}, isbn = {978-1-4799-2794-4}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T13:50:23.000+0200}, title = {A hardware-efficient variable-length FFT processor for low-power applications.}, url = {http://dblp.uni-trier.de/db/conf/apsipa/apsipa2013.html#BoDHZ13}, year = 2013 }