%0 Journal Article %1 journals/iet-cds/SunDR007 %A Sun, Fei %A Devarajan, Siddharth %A Rose, Kenneth %A Zhang, Tong %D 2007 %J IET Circuits Devices Syst. %K dblp %N 3 %P 241-249 %T Design of on-chip error correction systems for multilevel NOR and NAND flash memories. %U http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds1.html#SunDR007 %V 1

@article{journals/iet-cds/SunDR007, added-at = {2020-09-10T00:00:00.000+0200}, author = {Sun, Fei and Devarajan, Siddharth and Rose, Kenneth and Zhang, Tong}, biburl = {https://www.bibsonomy.org/bibtex/2ddf8e3058838774462c4879a54920421/dblp}, ee = {https://doi.org/10.1049/iet-cds:20060275}, interhash = {5473855d410886dad5fbefc4afc1128f}, intrahash = {ddf8e3058838774462c4879a54920421}, journal = {IET Circuits Devices Syst.}, keywords = {dblp}, number = 3, pages = {241-249}, timestamp = {2020-09-11T11:44:01.000+0200}, title = {Design of on-chip error correction systems for multilevel NOR and NAND flash memories.}, url = {http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds1.html#SunDR007}, volume = 1, year = 2007 }