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%0 Conference Paper
%1 conf/hpec/FaberHXCC22
%A Faber, Clayton J.
%A Harris, Steven D.
%A Xiao, Zhili
%A Chamberlain, Roger D.
%A Cabrera, Anthony M.
%B HPEC
%D 2022
%I IEEE
%K dblp
%P 1-7
%T Challenges Designing for FPGAs Using High-Level Synthesis.
%U http://dblp.uni-trier.de/db/conf/hpec/hpec2022.html#FaberHXCC22
%@ 978-1-6654-9786-2
@inproceedings{conf/hpec/FaberHXCC22,
added-at = {2023-06-26T00:00:00.000+0200},
author = {Faber, Clayton J. and Harris, Steven D. and Xiao, Zhili and Chamberlain, Roger D. and Cabrera, Anthony M.},
biburl = {https://www.bibsonomy.org/bibtex/2403b194e93e18bf1c3dfcb5eb17a0973/dblp},
booktitle = {HPEC},
crossref = {conf/hpec/2022},
ee = {https://doi.org/10.1109/HPEC55821.2022.9926398},
interhash = {57e71cd387636740856929234c9f9554},
intrahash = {403b194e93e18bf1c3dfcb5eb17a0973},
isbn = {978-1-6654-9786-2},
keywords = {dblp},
pages = {1-7},
publisher = {IEEE},
timestamp = {2024-04-10T01:27:15.000+0200},
title = {Challenges Designing for FPGAs Using High-Level Synthesis.},
url = {http://dblp.uni-trier.de/db/conf/hpec/hpec2022.html#FaberHXCC22},
year = 2022
}