%0 Conference Paper %1 conf/aspdac/RenYCZR15 %A Ren, Xiaowei %A Yu, Qihang %A Chen, Badong %A Zheng, Nanning %A Ren, Pengju %B ASP-DAC %D 2015 %I IEEE %K dblp %P 18-19 %T A 128-way FPGA platform for the acceleration of KLMS algorithm. %U http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#RenYCZR15 %@ 978-1-4799-7792-5

@inproceedings{conf/aspdac/RenYCZR15, added-at = {2017-05-26T00:00:00.000+0200}, author = {Ren, Xiaowei and Yu, Qihang and Chen, Badong and Zheng, Nanning and Ren, Pengju}, biburl = {https://www.bibsonomy.org/bibtex/23c38d551e89e12e53e324803096876dd/dblp}, booktitle = {ASP-DAC}, crossref = {conf/aspdac/2015}, ee = {https://doi.org/10.1109/ASPDAC.2015.7058925}, interhash = {57fe06e12f7c2cb1d4072688059e4e72}, intrahash = {3c38d551e89e12e53e324803096876dd}, isbn = {978-1-4799-7792-5}, keywords = {dblp}, pages = {18-19}, publisher = {IEEE}, timestamp = {2019-10-17T16:45:23.000+0200}, title = {A 128-way FPGA platform for the acceleration of KLMS algorithm.}, url = {http://dblp.uni-trier.de/db/conf/aspdac/aspdac2015.html#RenYCZR15}, year = 2015 }