%0 Journal Article %1 journals/cssp/YesilMP22 %A Yesil, Abdullah %A Minaei, Shahram %A Psychalinos, Costas %D 2022 %J Circuits Syst. Signal Process. %K dblp %N 4 %P 1819-1833 %T ± 0.45 V CMOS Second-Generation Voltage Conveyor Based on Super Source Follower. %U http://dblp.uni-trier.de/db/journals/cssp/cssp41.html#YesilMP22 %V 41

@article{journals/cssp/YesilMP22, added-at = {2022-03-15T00:00:00.000+0100}, author = {Yesil, Abdullah and Minaei, Shahram and Psychalinos, Costas}, biburl = {https://www.bibsonomy.org/bibtex/2f00eed5100fa861de36421b8227cdbdc/dblp}, ee = {https://doi.org/10.1007/s00034-021-01867-7}, interhash = {5c7ec8a4486dab65e17a722cc0fba6ff}, intrahash = {f00eed5100fa861de36421b8227cdbdc}, journal = {Circuits Syst. Signal Process.}, keywords = {dblp}, number = 4, pages = {1819-1833}, timestamp = {2024-04-08T15:54:34.000+0200}, title = {± 0.45 V CMOS Second-Generation Voltage Conveyor Based on Super Source Follower.}, url = {http://dblp.uni-trier.de/db/journals/cssp/cssp41.html#YesilMP22}, volume = 41, year = 2022 }