%0 Conference Paper %1 conf/socc/TrancheroR09 %A Tranchero, Maurizio %A Reyneri, Leonardo Maria %B SoCC %D 2009 %I IEEE %K dblp %P 19-22 %T A multi-level simulation approach in a Simulink-based design tool for FPGAs. %U http://dblp.uni-trier.de/db/conf/socc/socc2009.html#TrancheroR09 %@ 978-1-4244-4940-8

@inproceedings{conf/socc/TrancheroR09, added-at = {2011-09-15T00:00:00.000+0200}, author = {Tranchero, Maurizio and Reyneri, Leonardo Maria}, biburl = {https://www.bibsonomy.org/bibtex/24bcd275316d88de69fdff936719f193e/dblp}, booktitle = {SoCC}, crossref = {conf/socc/2009}, ee = {http://dx.doi.org/10.1109/SOCCON.2009.5398105}, interhash = {5e42d51a5ad5c565bf9dec976d96d73f}, intrahash = {4bcd275316d88de69fdff936719f193e}, isbn = {978-1-4244-4940-8}, keywords = {dblp}, pages = {19-22}, publisher = {IEEE}, timestamp = {2011-11-15T11:36:39.000+0100}, title = {A multi-level simulation approach in a Simulink-based design tool for FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/socc/socc2009.html#TrancheroR09}, year = 2009 }