%0 Conference Paper %1 conf/ahs/SterponeB08 %A Sterpone, Luca %A Battezzati, Niccolò %B AHS %D 2008 %E Keymeulen, Didier %E Arslan, Tughrul %E Suess, Martin %E Stoica, Adrian %E Erdogan, Ahmet T. %E Merodio, David %I IEEE Computer Society %K dblp %P 157-163 %T A Novel Design Flow for the Performance Optimization of Fault Tolerant Circuits on SRAM-based FPGA's. %U http://dblp.uni-trier.de/db/conf/ahs/ahs2008.html#SterponeB08 %@ 978-0-7695-3166-3

@inproceedings{conf/ahs/SterponeB08, added-at = {2023-03-23T00:00:00.000+0100}, author = {Sterpone, Luca and Battezzati, Niccolò}, biburl = {https://www.bibsonomy.org/bibtex/23695f121c4a3c80c95a36a1e66f11b11/dblp}, booktitle = {AHS}, crossref = {conf/ahs/2008}, editor = {Keymeulen, Didier and Arslan, Tughrul and Suess, Martin and Stoica, Adrian and Erdogan, Ahmet T. and Merodio, David}, ee = {https://www.wikidata.org/entity/Q57699156}, interhash = {60eccf3220a2b0f3f2b8445436b1b468}, intrahash = {3695f121c4a3c80c95a36a1e66f11b11}, isbn = {978-0-7695-3166-3}, keywords = {dblp}, pages = {157-163}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:00:21.000+0200}, title = {A Novel Design Flow for the Performance Optimization of Fault Tolerant Circuits on SRAM-based FPGA's.}, url = {http://dblp.uni-trier.de/db/conf/ahs/ahs2008.html#SterponeB08}, year = 2008 }