%0 Conference Paper %1 conf/vlsit/CaiBRFGNJTCK22 %A Cai, Kaiming %A Beek, Simon Van %A Rao, Siddharth %A Fan, K. %A Gupta, M. %A Nguyen, V. D. %A Jayakumar, Ganesh %A Talmelli, Giacomo %A Couet, S. %A Kar, Gouri Sankar %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 375-376 %T Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#CaiBRFGNJTCK22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/CaiBRFGNJTCK22, added-at = {2023-05-24T00:00:00.000+0200}, author = {Cai, Kaiming and Beek, Simon Van and Rao, Siddharth and Fan, K. and Gupta, M. and Nguyen, V. D. and Jayakumar, Ganesh and Talmelli, Giacomo and Couet, S. and Kar, Gouri Sankar}, biburl = {https://www.bibsonomy.org/bibtex/2614084fce8a2e3c205708cee36999c0a/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830307}, interhash = {617715190cbaa94468b0a3258fefa6b6}, intrahash = {614084fce8a2e3c205708cee36999c0a}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {375-376}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#CaiBRFGNJTCK22}, year = 2022 }