%0 Conference Paper %1 conf/ddecs/Vasicek21 %A Vasícek, Zdenek %B DDECS %D 2021 %E Shafique, Muhammad %E Steininger, Andreas %E Sekanina, Lukás %E Krstic, Milos %E Stojanovic, Goran %E Mrazek, Vojtech %I IEEE %K dblp %P 17-22 %T Synthesis of approximate circuits for LUT-based FPGAs. %U http://dblp.uni-trier.de/db/conf/ddecs/ddecs2021.html#Vasicek21 %@ 978-1-6654-3595-6

@inproceedings{conf/ddecs/Vasicek21, added-at = {2021-05-04T00:00:00.000+0200}, author = {Vasícek, Zdenek}, biburl = {https://www.bibsonomy.org/bibtex/2a4c0adbe274cf94efd982b861ecfa356/dblp}, booktitle = {DDECS}, crossref = {conf/ddecs/2021}, editor = {Shafique, Muhammad and Steininger, Andreas and Sekanina, Lukás and Krstic, Milos and Stojanovic, Goran and Mrazek, Vojtech}, ee = {https://doi.org/10.1109/DDECS52668.2021.9417066}, interhash = {61d16370a5bf6361ddd4643b30df8baa}, intrahash = {a4c0adbe274cf94efd982b861ecfa356}, isbn = {978-1-6654-3595-6}, keywords = {dblp}, pages = {17-22}, publisher = {IEEE}, timestamp = {2024-04-09T09:40:12.000+0200}, title = {Synthesis of approximate circuits for LUT-based FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/ddecs/ddecs2021.html#Vasicek21}, year = 2021 }