%0 Journal Article %1 journals/jssc/TuWL17 %A Tu, Chih-Chan %A Wang, Yu-Kai %A Lin, Tsung-Hsien %D 2017 %J IEEE J. Solid State Circuits %K dblp %N 10 %P 2523-2532 %T A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#TuWL17 %V 52

@article{journals/jssc/TuWL17, added-at = {2020-08-30T00:00:00.000+0200}, author = {Tu, Chih-Chan and Wang, Yu-Kai and Lin, Tsung-Hsien}, biburl = {https://www.bibsonomy.org/bibtex/28329f846cddf5f6b2e1a50b2ca6e11bf/dblp}, ee = {https://doi.org/10.1109/JSSC.2017.2724025}, interhash = {62b04d2d3d9131cbc410d31f52dbc750}, intrahash = {8329f846cddf5f6b2e1a50b2ca6e11bf}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 10, pages = {2523-2532}, timestamp = {2020-08-31T11:42:04.000+0200}, title = {A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc52.html#TuWL17}, volume = 52, year = 2017 }