%0 Conference Paper %1 conf/asscc/NiitsuSHYK11 %A Niitsu, Kiichi %A Sakurai, Masato %A Harigai, Naohiro %A Yamaguchi, Takahiro J. %A Kobayashi, Haruo %B A-SSCC %D 2011 %I IEEE %K dblp %P 201-204 %T An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation. %U http://dblp.uni-trier.de/db/conf/asscc/asscc2011.html#NiitsuSHYK11 %@ 978-1-4577-1784-0

@inproceedings{conf/asscc/NiitsuSHYK11, added-at = {2023-03-21T00:00:00.000+0100}, author = {Niitsu, Kiichi and Sakurai, Masato and Harigai, Naohiro and Yamaguchi, Takahiro J. and Kobayashi, Haruo}, biburl = {https://www.bibsonomy.org/bibtex/20497f274c5eb5d1e823c0030c84a798e/dblp}, booktitle = {A-SSCC}, crossref = {conf/asscc/2011}, ee = {https://doi.org/10.1109/ASSCC.2011.6123637}, interhash = {68784978622d8b94a406e231822644b5}, intrahash = {0497f274c5eb5d1e823c0030c84a798e}, isbn = {978-1-4577-1784-0}, keywords = {dblp}, pages = {201-204}, publisher = {IEEE}, timestamp = {2024-04-10T21:35:40.000+0200}, title = {An on-chip timing jitter measurement circuit using a self-referenced clock and a cascaded time difference amplifier with duty-cycle compensation.}, url = {http://dblp.uni-trier.de/db/conf/asscc/asscc2011.html#NiitsuSHYK11}, year = 2011 }