%0 Conference Paper %1 conf/vlsi/AbbasT16 %A Abbas, Syed Mohsin %A Tsui, Chi-Ying %B VLSI-SoC %D 2016 %I IEEE %K dblp %P 1-5 %T Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO. %U http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2016.html#AbbasT16 %@ 978-1-5090-3561-8

@inproceedings{conf/vlsi/AbbasT16, added-at = {2017-06-15T00:00:00.000+0200}, author = {Abbas, Syed Mohsin and Tsui, Chi-Ying}, biburl = {https://www.bibsonomy.org/bibtex/296d3f40f9d477ceeab18ca9b4e3e1756/dblp}, booktitle = {VLSI-SoC}, crossref = {conf/vlsi/2016soc}, ee = {https://doi.org/10.1109/VLSI-SoC.2016.7753561}, interhash = {69e33eafd12422203a0dcdebdd476fd4}, intrahash = {96d3f40f9d477ceeab18ca9b4e3e1756}, isbn = {978-1-5090-3561-8}, keywords = {dblp}, pages = {1-5}, publisher = {IEEE}, timestamp = {2019-10-17T14:01:58.000+0200}, title = {Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO.}, url = {http://dblp.uni-trier.de/db/conf/vlsi/vlsisoc2016.html#AbbasT16}, year = 2016 }