%0 Conference Paper %1 conf/ispd/GoreTG21 %A Gore, Ganesh %A Tang, Xifan %A Gaillardon, Pierre-Emmanuel %B ISPD %D 2021 %E Lienig, Jens %E Behjat, Laleh %E Yang, Stephen %I ACM %K dblp %P 135-142 %T A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs. %U http://dblp.uni-trier.de/db/conf/ispd/ispd2021.html#GoreTG21 %@ 978-1-4503-8300-4

@inproceedings{conf/ispd/GoreTG21, added-at = {2021-04-12T00:00:00.000+0200}, author = {Gore, Ganesh and Tang, Xifan and Gaillardon, Pierre-Emmanuel}, biburl = {https://www.bibsonomy.org/bibtex/243b6ea4052f5317e54c51dd676d72d61/dblp}, booktitle = {ISPD}, crossref = {conf/ispd/2021}, editor = {Lienig, Jens and Behjat, Laleh and Yang, Stephen}, ee = {https://doi.org/10.1145/3439706.3447047}, interhash = {70473ab79b467849eb3593c409c62496}, intrahash = {43b6ea4052f5317e54c51dd676d72d61}, isbn = {978-1-4503-8300-4}, keywords = {dblp}, pages = {135-142}, publisher = {ACM}, timestamp = {2024-04-09T16:38:25.000+0200}, title = {A Scalable and Robust Hierarchical Floorplanning to Enable 24-hour Prototyping for 100k-LUT FPGAs.}, url = {http://dblp.uni-trier.de/db/conf/ispd/ispd2021.html#GoreTG21}, year = 2021 }