%0 Conference Paper %1 conf/vlsit/QinTBLKCJWW22 %A Qin, Shengjun %A Tung, Maryann C. %A Belliveau, Emma %A Liu, Shuhan %A Kwon, Jimin %A Chen, Wei-Chen %A Jiang, Zizhen %A Wong, S. Simon %A Wong, H.-S. Philip %B VLSI Technology and Circuits %D 2022 %I IEEE %K dblp %P 314-315 %T 8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory. %U http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#QinTBLKCJWW22 %@ 978-1-6654-9772-5

@inproceedings{conf/vlsit/QinTBLKCJWW22, added-at = {2022-08-05T00:00:00.000+0200}, author = {Qin, Shengjun and Tung, Maryann C. and Belliveau, Emma and Liu, Shuhan and Kwon, Jimin and Chen, Wei-Chen and Jiang, Zizhen and Wong, S. Simon and Wong, H.-S. Philip}, biburl = {https://www.bibsonomy.org/bibtex/25cb02f5e5add3327b1a567df5fb71560/dblp}, booktitle = {VLSI Technology and Circuits}, crossref = {conf/vlsit/2022}, ee = {https://doi.org/10.1109/VLSITechnologyandCir46769.2022.9830164}, interhash = {704b89ad07468af4e1aab45d278ff120}, intrahash = {5cb02f5e5add3327b1a567df5fb71560}, isbn = {978-1-6654-9772-5}, keywords = {dblp}, pages = {314-315}, publisher = {IEEE}, timestamp = {2024-04-09T19:13:06.000+0200}, title = {8-Layer 3D Vertical Ru/AlOxNy/TiN RRAM with Mega-Ω Level LRS for Low Power and Ultrahigh-density Memory.}, url = {http://dblp.uni-trier.de/db/conf/vlsit/vlsit2022.html#QinTBLKCJWW22}, year = 2022 }