%0 Conference Paper %1 conf/3dic/EgawaSTK13 %A Egawa, Ryusuke %A Sato, Masayuki %A Tada, Jubee %A Kobayashi, Hiroaki %B 3DIC %D 2013 %I IEEE %K dblp %P 1-6 %T Vertically integrated processor and memory module design for vector supercomputers. %U http://dblp.uni-trier.de/db/conf/3dic/3dic2013.html#EgawaSTK13 %@ 978-1-4673-6484-3

@inproceedings{conf/3dic/EgawaSTK13, added-at = {2018-03-06T00:00:00.000+0100}, author = {Egawa, Ryusuke and Sato, Masayuki and Tada, Jubee and Kobayashi, Hiroaki}, biburl = {https://www.bibsonomy.org/bibtex/28bfa62b5591b60064ce84305742be410/dblp}, booktitle = {3DIC}, crossref = {conf/3dic/2013}, ee = {https://doi.org/10.1109/3DIC.2013.6702377}, interhash = {756c0ef06d3c59877515c7888667d889}, intrahash = {8bfa62b5591b60064ce84305742be410}, isbn = {978-1-4673-6484-3}, keywords = {dblp}, pages = {1-6}, publisher = {IEEE}, timestamp = {2019-10-17T15:31:37.000+0200}, title = {Vertically integrated processor and memory module design for vector supercomputers.}, url = {http://dblp.uni-trier.de/db/conf/3dic/3dic2013.html#EgawaSTK13}, year = 2013 }