%0 Conference Paper %1 conf/icfpt/AlqahtaniZSMW20 %A Alqahtani, Sultan %A Zhu, Yiqun %A Shi, Qizhi %A Meng, Xiaolin %A Wang, Xinhua %B FPT %D 2020 %I IEEE %K dblp %P 250-255 %T Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix Inversion. %U http://dblp.uni-trier.de/db/conf/icfpt/icfpt2020.html#AlqahtaniZSMW20 %@ 978-1-6654-2302-1

@inproceedings{conf/icfpt/AlqahtaniZSMW20, added-at = {2022-01-03T00:00:00.000+0100}, author = {Alqahtani, Sultan and Zhu, Yiqun and Shi, Qizhi and Meng, Xiaolin and Wang, Xinhua}, biburl = {https://www.bibsonomy.org/bibtex/201fa10ec05625a3fe7fe3e0a695e4e5c/dblp}, booktitle = {FPT}, crossref = {conf/icfpt/2020}, ee = {https://doi.org/10.1109/ICFPT51103.2020.00043}, interhash = {786ee8c9f8d4523762a19bbf982ab5f2}, intrahash = {01fa10ec05625a3fe7fe3e0a695e4e5c}, isbn = {978-1-6654-2302-1}, keywords = {dblp}, pages = {250-255}, publisher = {IEEE}, timestamp = {2024-04-10T00:08:02.000+0200}, title = {Hardware Implementations with High Throughput, Low-Latency and Low-Area for Matrix Inversion.}, url = {http://dblp.uni-trier.de/db/conf/icfpt/icfpt2020.html#AlqahtaniZSMW20}, year = 2020 }