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%0 Journal Article
%1 journals/et/JuniorRSTVT05
%A Júnior, D. Barros
%A Rodríguez-Irago, Marcial Jesús
%A Santos, Marcelino B.
%A Teixeira, Isabel C.
%A Vargas, Fabian
%A Teixeira, João Paulo
%D 2005
%J J. Electron. Test.
%K dblp
%N 4
%P 349-363
%T Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.
%U http://dblp.uni-trier.de/db/journals/et/et21.html#JuniorRSTVT05
%V 21
@article{journals/et/JuniorRSTVT05,
added-at = {2022-09-30T00:00:00.000+0200},
author = {Júnior, D. Barros and Rodríguez-Irago, Marcial Jesús and Santos, Marcelino B. and Teixeira, Isabel C. and Vargas, Fabian and Teixeira, João Paulo},
biburl = {https://www.bibsonomy.org/bibtex/226104992a689a440dcd8bd4f4a28828f/dblp},
ee = {https://doi.org/10.1007/s10836-005-0972-z},
interhash = {7a3cf9cb47da72a74a7a86772928d71f},
intrahash = {26104992a689a440dcd8bd4f4a28828f},
journal = {J. Electron. Test.},
keywords = {dblp},
number = 4,
pages = {349-363},
timestamp = {2024-04-08T20:52:46.000+0200},
title = {Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.},
url = {http://dblp.uni-trier.de/db/journals/et/et21.html#JuniorRSTVT05},
volume = 21,
year = 2005
}