%0 Journal Article %1 journals/jssc/TsengWH10 %A Tseng, Chun-Yen %A Wang, Li-Wen %A Huang, Po-Chiun %D 2010 %J IEEE J. Solid State Circuits %K dblp %N 11 %P 2239-2249 %T An Integrated Linear Regulator With Fast Output Voltage Transition for Dual-Supply SRAMs in DVFS Systems. %U http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#TsengWH10 %V 45

@article{journals/jssc/TsengWH10, added-at = {2020-08-30T00:00:00.000+0200}, author = {Tseng, Chun-Yen and Wang, Li-Wen and Huang, Po-Chiun}, biburl = {https://www.bibsonomy.org/bibtex/2d1659ad1a0f03c2416e633578eb884d3/dblp}, ee = {https://doi.org/10.1109/JSSC.2010.2063990}, interhash = {7accc760da1f868b38472449e16374b7}, intrahash = {d1659ad1a0f03c2416e633578eb884d3}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 11, pages = {2239-2249}, timestamp = {2020-08-31T11:41:17.000+0200}, title = {An Integrated Linear Regulator With Fast Output Voltage Transition for Dual-Supply SRAMs in DVFS Systems.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc45.html#TsengWH10}, volume = 45, year = 2010 }