%0 Conference Paper %1 conf/dac/LiuSRC02 %A Liu, Hongzhou %A Singhee, Amith %A Rutenbar, Rob A. %A Carley, L. Richard %B DAC %D 2002 %I ACM %K dblp %P 437-442 %T Remembrance of circuits past: macromodeling by data mining in large analog design spaces. %U http://dblp.uni-trier.de/db/conf/dac/dac2002.html#LiuSRC02 %@ 1-58113-461-4

@inproceedings{conf/dac/LiuSRC02, added-at = {2018-11-06T00:00:00.000+0100}, author = {Liu, Hongzhou and Singhee, Amith and Rutenbar, Rob A. and Carley, L. Richard}, biburl = {https://www.bibsonomy.org/bibtex/22fe72e8394f6dff5e000ceb40ea66537/dblp}, booktitle = {DAC}, crossref = {conf/dac/2002}, ee = {https://doi.org/10.1145/513918.514030}, interhash = {7df65b1c004d86d5082af75d2275a9bb}, intrahash = {2fe72e8394f6dff5e000ceb40ea66537}, isbn = {1-58113-461-4}, keywords = {dblp}, pages = {437-442}, publisher = {ACM}, timestamp = {2018-11-07T15:13:19.000+0100}, title = {Remembrance of circuits past: macromodeling by data mining in large analog design spaces.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2002.html#LiuSRC02}, year = 2002 }