%0 Conference Paper %1 conf/tase/LiuLLHY19 %A Liu, Junxiu %A Liang, Zhewei %A Luo, Yuling %A Huang, Jiadong %A Yang, Su %B TASE %D 2019 %E Méry, Dominique %E Qin, Shengchao %I IEEE %K dblp %P 81-85 %T Hardware Tripartite Synapse Architecture based on Stochastic Computing. %U http://dblp.uni-trier.de/db/conf/tase/tase2019.html#LiuLLHY19 %@ 978-1-7281-3342-3

@inproceedings{conf/tase/LiuLLHY19, added-at = {2019-12-08T00:00:00.000+0100}, author = {Liu, Junxiu and Liang, Zhewei and Luo, Yuling and Huang, Jiadong and Yang, Su}, biburl = {https://www.bibsonomy.org/bibtex/2cef84afff1eefa2622f02225eb7efac8/dblp}, booktitle = {TASE}, crossref = {conf/tase/2019}, editor = {Méry, Dominique and Qin, Shengchao}, ee = {https://doi.org/10.1109/TASE.2019.00-16}, interhash = {7ef15d9c3a533225e380dea3e604adc3}, intrahash = {cef84afff1eefa2622f02225eb7efac8}, isbn = {978-1-7281-3342-3}, keywords = {dblp}, pages = {81-85}, publisher = {IEEE}, timestamp = {2019-12-10T11:39:39.000+0100}, title = {Hardware Tripartite Synapse Architecture based on Stochastic Computing.}, url = {http://dblp.uni-trier.de/db/conf/tase/tase2019.html#LiuLLHY19}, year = 2019 }