%0 Conference Paper %1 conf/glvlsi/MelgarejoP04 %A Melgarejo, Miguel A. %A Peña-Reyes, Carlos Andrés %B ACM Great Lakes Symposium on VLSI %D 2004 %E Garrett, David %E Lach, John C. %E Zukowski, Charles A. %I ACM %K dblp %P 458-461 %T Hardware architecture and FPGA implementation of a type-2 fuzzy system. %U http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2004.html#MelgarejoP04 %@ 1-58113-853-9

@inproceedings{conf/glvlsi/MelgarejoP04, added-at = {2018-11-06T00:00:00.000+0100}, author = {Melgarejo, Miguel A. and Peña-Reyes, Carlos Andrés}, biburl = {https://www.bibsonomy.org/bibtex/2d89399eaf62cf049d0cd7ee5483bef7b/dblp}, booktitle = {ACM Great Lakes Symposium on VLSI}, crossref = {conf/glvlsi/2004}, editor = {Garrett, David and Lach, John C. and Zukowski, Charles A.}, ee = {https://doi.org/10.1145/988952.989063}, interhash = {815c7239eb2635d23e75765206172308}, intrahash = {d89399eaf62cf049d0cd7ee5483bef7b}, isbn = {1-58113-853-9}, keywords = {dblp}, pages = {458-461}, publisher = {ACM}, timestamp = {2024-04-09T22:50:39.000+0200}, title = {Hardware architecture and FPGA implementation of a type-2 fuzzy system.}, url = {http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2004.html#MelgarejoP04}, year = 2004 }