%0 Conference Paper %1 conf/nsdi/FengZLXZWCYT24 %A Feng, Chengquan %A Zhang, Li Lyna %A Liu, Yuanchi %A Xu, Jiahang %A Zhang, Chengruidong %A Wang, Zhiyuan %A Cao, Ting %A Yang, Mao %A Tan, Haisheng %B NSDI %D 2024 %E Vanbever, Laurent %E Zhang, Irene %I USENIX Association %K dblp %T LitePred: Transferable and Scalable Latency Prediction for Hardware-Aware Neural Architecture Search. %U http://dblp.uni-trier.de/db/conf/nsdi/nsdi2024.html#FengZLXZWCYT24

@inproceedings{conf/nsdi/FengZLXZWCYT24, added-at = {2024-10-21T00:00:00.000+0200}, author = {Feng, Chengquan and Zhang, Li Lyna and Liu, Yuanchi and Xu, Jiahang and Zhang, Chengruidong and Wang, Zhiyuan and Cao, Ting and Yang, Mao and Tan, Haisheng}, biburl = {https://www.bibsonomy.org/bibtex/2d5f78bfdba37e3d6cb8cd43bbfa8039c/dblp}, booktitle = {NSDI}, crossref = {conf/nsdi/2024}, editor = {Vanbever, Laurent and Zhang, Irene}, ee = {https://www.usenix.org/conference/nsdi24/presentation/feng-chengquan}, interhash = {823318f621b39283f4eebcc2ecc3d0d9}, intrahash = {d5f78bfdba37e3d6cb8cd43bbfa8039c}, keywords = {dblp}, publisher = {USENIX Association}, timestamp = {2024-10-28T07:26:25.000+0100}, title = {LitePred: Transferable and Scalable Latency Prediction for Hardware-Aware Neural Architecture Search.}, url = {http://dblp.uni-trier.de/db/conf/nsdi/nsdi2024.html#FengZLXZWCYT24}, year = 2024 }