%0 Journal Article %1 journals/jsa/GajdaTT90 %A Gajda, Ryszard F. %A Thor, Miroslaw %A Tudruj, Marek S. %D 1990 %J Microprocessing and Microprogramming %K dblp %N 1-5 %P 683-691 %T Enhancing a control graph based HDL for performance evaluation of simulated architectures. %U http://dblp.uni-trier.de/db/journals/jsa/jsa30.html#GajdaTT90 %V 30

@article{journals/jsa/GajdaTT90, added-at = {2024-07-12T00:00:00.000+0200}, author = {Gajda, Ryszard F. and Thor, Miroslaw and Tudruj, Marek S.}, biburl = {https://www.bibsonomy.org/bibtex/262dbaac5fc02704d8f70ab99b15cbe5a/dblp}, ee = {https://doi.org/10.1016/0165-6074(90)90318-4}, interhash = {836ba089ca8c5befb5c2bc5b6af187f6}, intrahash = {62dbaac5fc02704d8f70ab99b15cbe5a}, journal = {Microprocessing and Microprogramming}, keywords = {dblp}, number = {1-5}, pages = {683-691}, timestamp = {2024-07-15T07:09:14.000+0200}, title = {Enhancing a control graph based HDL for performance evaluation of simulated architectures.}, url = {http://dblp.uni-trier.de/db/journals/jsa/jsa30.html#GajdaTT90}, volume = 30, year = 1990 }