%0 Journal Article %1 journals/tvlsi/BsoulWTL16 %A Bsoul, Assem A. M. %A Wilton, Steven J. E. %A Tsoi, Kuen Hung %A Luk, Wayne %D 2016 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 1 %P 178-191 %T An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#BsoulWTL16 %V 24

@article{journals/tvlsi/BsoulWTL16, added-at = {2020-03-11T00:00:00.000+0100}, author = {Bsoul, Assem A. M. and Wilton, Steven J. E. and Tsoi, Kuen Hung and Luk, Wayne}, biburl = {https://www.bibsonomy.org/bibtex/27016a28b0b422eb50d5943162e753faf/dblp}, ee = {https://doi.org/10.1109/TVLSI.2015.2393914}, interhash = {8798a56e98b6d5f67032d323b6aca849}, intrahash = {7016a28b0b422eb50d5943162e753faf}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 1, pages = {178-191}, timestamp = {2020-03-12T11:44:31.000+0100}, title = {An FPGA Architecture and CAD Flow Supporting Dynamically Controlled Power Gating.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi24.html#BsoulWTL16}, volume = 24, year = 2016 }