%0 Journal Article %1 journals/tcad/MessarisSSKNP18 %A Messaris, Ioannis %A Serb, Alexander %A Stathopoulos, Spyros %A Khiat, Ali %A Nikolaidis, Spyridon %A Prodromakis, Themistoklis %D 2018 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 12 %P 3151-3162 %T A Data-Driven Verilog-A ReRAM Model. %U http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#MessarisSSKNP18 %V 37

@article{journals/tcad/MessarisSSKNP18, added-at = {2022-10-04T00:00:00.000+0200}, author = {Messaris, Ioannis and Serb, Alexander and Stathopoulos, Spyros and Khiat, Ali and Nikolaidis, Spyridon and Prodromakis, Themistoklis}, biburl = {https://www.bibsonomy.org/bibtex/2ea2a8a800ca9151a06cbead7860bde88/dblp}, ee = {https://www.wikidata.org/entity/Q61715806}, interhash = {8a3939c082f54e74198d88677eff12e4}, intrahash = {ea2a8a800ca9151a06cbead7860bde88}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 12, pages = {3151-3162}, timestamp = {2024-04-08T19:45:45.000+0200}, title = {A Data-Driven Verilog-A ReRAM Model.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#MessarisSSKNP18}, volume = 37, year = 2018 }