%0 Conference Paper %1 conf/vlsic/MiyaokaTKKMSKSD16 %A Miyaoka, Hiroki %A Terasawa, Futoshi %A Kudo, Masahiro %A Kano, Hideki %A Matsuda, Atsushi %A Shirai, Noriaki %A Kawai, Shigeaki %A Shibasaki, Takayuki %A Danjo, Takumi %A Ogata, Yuuki %A Sakai, Yasufumi %A Yamaguchi, Hisakatsu %A Mori, Toshihiko %A Koyanagi, Yoichi %A Tamura, Hirotaka %A Ide, Yutaka %A Terashima, Kazuhiro %A Higashi, Hirohito %A Higuchi, Tomokazu %A Naka, Naoaki %B VLSI Circuits %D 2016 %I IEEE %K dblp %P 1-2 %T A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS. %U http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#MiyaokaTKKMSKSD16 %@ 978-1-5090-0635-9

@inproceedings{conf/vlsic/MiyaokaTKKMSKSD16, added-at = {2016-09-26T00:00:00.000+0200}, author = {Miyaoka, Hiroki and Terasawa, Futoshi and Kudo, Masahiro and Kano, Hideki and Matsuda, Atsushi and Shirai, Noriaki and Kawai, Shigeaki and Shibasaki, Takayuki and Danjo, Takumi and Ogata, Yuuki and Sakai, Yasufumi and Yamaguchi, Hisakatsu and Mori, Toshihiko and Koyanagi, Yoichi and Tamura, Hirotaka and Ide, Yutaka and Terashima, Kazuhiro and Higashi, Hirohito and Higuchi, Tomokazu and Naka, Naoaki}, biburl = {https://www.bibsonomy.org/bibtex/2b409aa9f3bdb26effef6d76dcbaa3e4f/dblp}, booktitle = {VLSI Circuits}, crossref = {conf/vlsic/2016}, ee = {http://dx.doi.org/10.1109/VLSIC.2016.7573472}, interhash = {8c5f42f203cc318b1ae958db4182a529}, intrahash = {b409aa9f3bdb26effef6d76dcbaa3e4f}, isbn = {978-1-5090-0635-9}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2016-09-27T11:36:21.000+0200}, title = {A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/vlsic/vlsic2016.html#MiyaokaTKKMSKSD16}, year = 2016 }