%0 Conference Paper %1 conf/icnn/NinomtyaEKA96 %A Ninomtya, Hiroshi %A Egawa, Kunitaka %A Kamio, Takeshi %A Asai, Hideki %B ICNN %D 1996 %I IEEE %K dblp %P 980-985 %T Design and implementation of neural network logic circuits with global convergence. %U http://dblp.uni-trier.de/db/conf/icnn/icnn1996.html#NinomtyaEKA96

@inproceedings{conf/icnn/NinomtyaEKA96, added-at = {2019-08-23T00:00:00.000+0200}, author = {Ninomtya, Hiroshi and Egawa, Kunitaka and Kamio, Takeshi and Asai, Hideki}, biburl = {https://www.bibsonomy.org/bibtex/2b15e39f7c27dffdc108ac4eb36885b81/dblp}, booktitle = {ICNN}, crossref = {conf/icnn/1996}, ee = {https://doi.org/10.1109/ICNN.1996.549030}, interhash = {921564235fdf5a467a44980a8347d8d0}, intrahash = {b15e39f7c27dffdc108ac4eb36885b81}, keywords = {dblp}, pages = {980-985}, publisher = {IEEE}, timestamp = {2019-08-24T11:39:01.000+0200}, title = {Design and implementation of neural network logic circuits with global convergence.}, url = {http://dblp.uni-trier.de/db/conf/icnn/icnn1996.html#NinomtyaEKA96}, year = 1996 }