%0 Conference Paper %1 conf/isvlsi/NajibiP08 %A Najibi, Mehrdad %A Pedram, Hossein %B ISVLSI %D 2008 %I IEEE Computer Society %K dblp %P 507-510 %T Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2008.html#NajibiP08 %@ 978-0-7695-3170-0

@inproceedings{conf/isvlsi/NajibiP08, added-at = {2023-03-24T00:00:00.000+0100}, author = {Najibi, Mehrdad and Pedram, Hossein}, biburl = {https://www.bibsonomy.org/bibtex/298f329fa4a4ccdb2830261ab95e9ff1e/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2008}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2008.66}, interhash = {92ece30016eca6ca6be7610a946d0202}, intrahash = {98f329fa4a4ccdb2830261ab95e9ff1e}, isbn = {978-0-7695-3170-0}, keywords = {dblp}, pages = {507-510}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:05:59.000+0200}, title = {Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2008.html#NajibiP08}, year = 2008 }