%0 Conference Paper %1 conf/iscas/FeyginCGCGHSSSW93 %A Feygin, Gennady %A Chow, Paul %A Gulak, P. Glenn %A Chappel, John %A Goodes, Grant %A Hall, Oswin %A Sayes, Ahmad %A Singh, Satwant %A Smith, Michael B. %A Wilton, Steven J. E. %B ISCAS %D 1993 %I IEEE %K dblp %P 1945-1948 %T A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. %U http://dblp.uni-trier.de/db/conf/iscas/iscas1993-3.html#FeyginCGCGHSSSW93 %@ 0-7803-1281-3

@inproceedings{conf/iscas/FeyginCGCGHSSSW93, added-at = {2016-05-20T00:00:00.000+0200}, author = {Feygin, Gennady and Chow, Paul and Gulak, P. Glenn and Chappel, John and Goodes, Grant and Hall, Oswin and Sayes, Ahmad and Singh, Satwant and Smith, Michael B. and Wilton, Steven J. E.}, biburl = {https://www.bibsonomy.org/bibtex/2fce8b1298342c6f6a653c0d1a3e69c72/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/1993}, ee = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=1067}, interhash = {9542577f0a59b08189c49e1689b9f169}, intrahash = {fce8b1298342c6f6a653c0d1a3e69c72}, isbn = {0-7803-1281-3}, keywords = {dblp}, pages = {1945-1948}, publisher = {IEEE}, timestamp = {2016-05-21T11:51:32.000+0200}, title = {A VLSI Implementation of a Cascade Viterbi Decoder with Traceback.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas1993-3.html#FeyginCGCGHSSSW93}, year = 1993 }