%0 Conference Paper %1 conf/smc/ChenL00a %A Chen, Hung-Pin %A Lee, Chiung-San %B SMC %D 2000 %I IEEE %K dblp %P 3710-3715 %T High speed multistage fuzzy hardware architecture for fuzzy logic control. %U http://dblp.uni-trier.de/db/conf/smc/smc2000.html#ChenL00a %@ 0-7803-6583-6

@inproceedings{conf/smc/ChenL00a, added-at = {2017-12-14T00:00:00.000+0100}, author = {Chen, Hung-Pin and Lee, Chiung-San}, biburl = {https://www.bibsonomy.org/bibtex/2bfe6444bed7047f2155a2fd204e51114/dblp}, booktitle = {SMC}, crossref = {conf/smc/2000}, ee = {https://doi.org/10.1109/ICSMC.2000.886587}, interhash = {9dbb819ddd2baf7a30af294584f5c663}, intrahash = {bfe6444bed7047f2155a2fd204e51114}, isbn = {0-7803-6583-6}, keywords = {dblp}, pages = {3710-3715}, publisher = {IEEE}, timestamp = {2019-10-17T22:33:53.000+0200}, title = {High speed multistage fuzzy hardware architecture for fuzzy logic control.}, url = {http://dblp.uni-trier.de/db/conf/smc/smc2000.html#ChenL00a}, year = 2000 }