%0 Conference Paper %1 conf/isvlsi/ShaerAA03 %A Shaer, Bassam %A Aurangabadkar, Kailash %A Agarwal, Nitin %B ISVLSI %D 2003 %I IEEE Computer Society %K dblp %P 244-245 %T Testable Sequential Circuit Design: Partitioning for Pseudoexhaustive Test. %U http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2003.html#ShaerAA03 %@ 0-7695-1904-0

@inproceedings{conf/isvlsi/ShaerAA03, added-at = {2023-03-24T00:00:00.000+0100}, author = {Shaer, Bassam and Aurangabadkar, Kailash and Agarwal, Nitin}, biburl = {https://www.bibsonomy.org/bibtex/24e16c27317c472906696c1cfe39989ad/dblp}, booktitle = {ISVLSI}, crossref = {conf/isvlsi/2003}, ee = {https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2003.1183484}, interhash = {a58609b66e0dc0e705f256caf5e34455}, intrahash = {4e16c27317c472906696c1cfe39989ad}, isbn = {0-7695-1904-0}, keywords = {dblp}, pages = {244-245}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T11:05:50.000+0200}, title = {Testable Sequential Circuit Design: Partitioning for Pseudoexhaustive Test.}, url = {http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2003.html#ShaerAA03}, year = 2003 }