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%0 Conference Paper
%1 conf/dac/SchweikertK72
%A Schweikert, Daniel G.
%A Kernighan, Brian W.
%B DAC
%D 1972
%E Freitag, Harlow
%E Galey, J. Michael
%E Sr., Robert B. Hitchcock
%E Saindon, J. M.
%E Wall, Herbert M.
%E Humcke, Donald J.
%E Hanne, J. R.
%I ACM
%K dblp
%P 57-62
%T A proper model for the partitioning of electrical circuits.
%U http://dblp.uni-trier.de/db/conf/dac/dac1972.html#SchweikertK72
@inproceedings{conf/dac/SchweikertK72,
added-at = {2018-11-06T00:00:00.000+0100},
author = {Schweikert, Daniel G. and Kernighan, Brian W.},
biburl = {https://www.bibsonomy.org/bibtex/239ab17faddedd7486deaf3898011c82e/dblp},
booktitle = {DAC},
crossref = {conf/dac/1972},
editor = {Freitag, Harlow and Galey, J. Michael and Sr., Robert B. Hitchcock and Saindon, J. M. and Wall, Herbert M. and Humcke, Donald J. and Hanne, J. R.},
ee = {https://doi.org/10.1145/800153.804930},
interhash = {a5b095bd14fd2c847c0b7ceb5eef8026},
intrahash = {39ab17faddedd7486deaf3898011c82e},
keywords = {dblp},
pages = {57-62},
publisher = {ACM},
timestamp = {2018-11-07T16:16:17.000+0100},
title = {A proper model for the partitioning of electrical circuits.},
url = {http://dblp.uni-trier.de/db/conf/dac/dac1972.html#SchweikertK72},
year = 1972
}
